CD74ACT109M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 100MHz |
| Propagation Delay | 10.3 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.6 ns |
| Family | ACT |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74ACT109M Overview
In the form of 16-SOIC (0.154, 3.90mm Width), it has been packaged. There is an embedded version in the package Tube. It is configured with Differentialas an output. In the configuration of the trigger, Positive Edgeis used. Surface Mountis in the way of this electric part. The JK flip flop operates at 4.5V~5.5Vvolts. A temperature of -55°C~125°C TAis used in the operation. This logic flip flop is classified as type JK Type. In terms of FPGAs, it belongs to the 74ACT series. It should not exceed 100MHzin terms of its output frequency. Currently, there are 16 terminations. It is a member of the 74ACT109 family. It is powered from a supply voltage of 5V. This JK flip flop has a 10pFfarad input capacitance. In terms of electronic devices, this device belongs to the ACTfamily of devices. In this case, the electronic component is mounted in the way of Surface Mount. 16pins are included in its design. The clock edge trigger type for this device is Positive Edge. This part is included in FF/Latches. To achieve this superior flexibility, 2 circuits are used. The D latch operates on 5V volts. If high efficiency is to be achieved, the supply voltage should be maintained at 5V. With a current output of 24mA , it offers maximum design flexibility. There is 4μA quiescent current consumption by it.
CD74ACT109M Features
Tube package
74ACT series
16 pins
5V power supplies
CD74ACT109M Applications
There are a lot of Texas Instruments CD74ACT109M Flip Flops applications.
- ATE
- Clock pulse
- Single Down Count-Control Line
- Memory
- Balanced Propagation Delays
- Differential Individual
- Consumer
- Functionally equivalent to the MC10/100EL29
- Load Control
- 2 – Bit synchronous counter
