CD74ACT112M96
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 100MHz |
| Propagation Delay | 12.2 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.6 ns |
| Family | ACT |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74ACT112M96 Overview
The item is packaged in 16-SOIC (0.154, 3.90mm Width)cases. There is an embedded version in the package Cut Tape (CT). T flip flop is configured with an output of Differential. It is configured with a trigger that uses Negative Edge. The electronic part is mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. -55°C~125°C TAis the operating temperature. There is JK Type type of electronic flip flop associated with this device. It is a type of FPGA belonging to the 74ACT series. You should not exceed 100MHzin its output frequency. Currently, there are 16 terminations. The 74ACT112family includes it. A voltage of 5V is used as the power supply for this D latch. A 10pFfarad input capacitance is provided by this T flip flop. ACTis the family of this D flip flop. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 16. This device has the clock edge trigger type of Negative Edge. This RS flip flops is a part number FF/Latches. In order to achieve its superior flexibility, 2 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TR. The D latch operates on 5V volts. In order to achieve high efficiency, the supply voltage should be maintained at 5V. This T flip flop features a maximum design flexibility due to its output current of 24mA. It consumes a total of 4μA quiescent current at any given time.
CD74ACT112M96 Features
Cut Tape (CT) package
74ACT series
16 pins
5V power supplies
CD74ACT112M96 Applications
There are a lot of Texas Instruments CD74ACT112M96 Flip Flops applications.
- Latch-up performance
- High Performance Logic for test systems
- Supports Live Insertion
- Single Up Count-Control Line
- Patented noise
- ATE
- CMOS Process
- Pattern generators
- Registers
- Counters
