CD74ACT273M96
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 50mA |
| Number of Bits | 8 |
| Clock Frequency | 80MHz |
| Propagation Delay | 13.5 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 3.4 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 13.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Number of Output Lines | 4 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74ACT273M96 Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). As part of the package Cut Tape (CT), it is embedded. As configured, the output uses Non-Inverted. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is operating at -55°C~125°C TA. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74ACT series. A frequency of 80MHzshould not be exceeded by its output. A total of 1elements are contained within it. There are 20 terminations,JK flip flop belongs to 74ACT273 family. The power source is powered by 5V. This T flip flop has a capacitance of 10pF farads at the input. Electronic devices of this type belong to the ACTfamily. There is an electronic component mounted in the way of Surface Mount. This board has 20 pins. The clock edge trigger type for this device is Positive Edge. This part is included in FF/Latches. An electronic part designed with 8bits is used in this application. To achieve this superior flexibility, 8 circuits are used. In light of its reliable performance, this T flip flop is well suited for TR. The system runs on a power supply of 5V watts. For high efficiency, the supply voltage should be kept at 5V. This T flip flop features a maximum design flexibility due to its output current of 50mA. There are 4 output lines in this JK flip flop. Despite external influences, it consumes 8μAof quiescent current.
CD74ACT273M96 Features
Cut Tape (CT) package
74ACT series
20 pins
8 Bits
5V power supplies
CD74ACT273M96 Applications
There are a lot of Texas Instruments CD74ACT273M96 Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- EMI reduction circuitry
- Balanced Propagation Delays
- Count Modes
- Parallel data storage
- Event Detectors
- Shift Registers
- Convert a momentary switch to a toggle switch
- Computing
- ESCC
