CD74ACT74M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT74 |
| Function | Set(Preset) and Reset |
| Number of Outputs | 4 |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 85MHz |
| Propagation Delay | 9.5 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.4 ns |
| Family | ACT |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Number of Output Lines | 1 |
| fmax-Min | 85 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 85000000Hz |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74ACT74M Overview
The flip flop is packaged in 14-SOIC (0.154, 3.90mm Width). D flip flop is included in the Tubepackage. It is configured with Differentialas an output. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. -55°C~125°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. In order for it to function properly, its output frequency should not exceed 85MHz. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 74ACT74. The D flip flop is powered by a voltage of 5V . A 10pFfarad input capacitance is provided by this T flip flop. An electronic device belonging to the family ACTcan be found here. Electronic part Surface Mountis mounted in the way. This board is designed with 14pins on it. A Positive Edgeclock edge trigger is used in this device. The part is included in FF/Latches. Using 2 circuits, it is highly flexible. The power supply is 5V. A high level of efficiency can be achieved by maintaining the supply voltage at 5V. With an output current of 24mA, this device offers maximum design flexibility. To operate, the chip has a total of 1 output lines. There is a consumption of 4μAof quiescent current from it.
CD74ACT74M Features
Tube package
74ACT series
14 pins
5V power supplies
CD74ACT74M Applications
There are a lot of Texas Instruments CD74ACT74M Flip Flops applications.
- Power down protection
- Data Synchronizers
- Clock pulse
- Counters
- Set-reset capability
- Memory
- Event Detectors
- Functionally equivalent to the MC10/100EL29
- Test & Measurement
- Data transfer
