CD74ACT74QM96G4Q1
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 122.413241mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | Automotive, AEC-Q100, 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT74 |
| Function | Set(Preset) and Reset |
| Number of Outputs | 4 |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 85MHz |
| Propagation Delay | 9.5 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.4 ns |
| Family | ACT |
| Logic Function | AND, D-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Number of Output Lines | 1 |
| fmax-Min | 85 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 85000000Hz |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74ACT74QM96G4Q1 Overview
As a result, it is packaged as 14-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tape & Reel (TR) package. As configured, the output uses Differential. Positive Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. A temperature of -40°C~125°C TAis used in the operation. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of Automotive, AEC-Q100, 74ACTseries FPGA. A frequency of 85MHzshould be the maximum output frequency. It has been determined that there have been 14 terminations. The 74ACT74 family contains this object. An input voltage of 5Vpowers the D latch. A 10pFfarad input capacitance is provided by this T flip flop. A device of this type belongs to the family of ACT. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 14. This device has Positive Edgeas its clock edge trigger type. It is part of the FF/Latchesbase part number family. The superior flexibility is achieved through the use of 2 circuits. Considering the reliability of this T flip flop, it is well suited for TR. In order for the device to operate, it requires 5V power supplies. If high efficiency is desired, the supply voltage should be kept at 5V. To operate, the chip has a total of 1 output lines. There is 4μA quiescent current consumption by it.
CD74ACT74QM96G4Q1 Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74ACT series
14 pins
5V power supplies
CD74ACT74QM96G4Q1 Applications
There are a lot of Texas Instruments CD74ACT74QM96G4Q1 Flip Flops applications.
- ESCC
- Power down protection
- Safety Clamp
- ESD protection
- Shift registers
- Cold spare funcion
- ATE
- Clock pulse
- Reduced system switching noise
- Consumer
