CD74HC107M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Base Part Number | 74HC107 |
| Function | Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Channels | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 170 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 14 ns |
| Family | HC/UH |
| Logic Function | Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.006 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 29ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74HC107M Overview
In the form of 14-SOIC (0.154, 3.90mm Width), it has been packaged. There is an embedded version in the package Tube. As configured, the output uses Differential. It is configured with the trigger Negative Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 2V~6Vis used as the supply voltage. It is at -55°C~125°C TAdegrees Celsius that the system is operating. There is JK Type type of electronic flip flop associated with this device. In FPGA terms, D flip flop is a type of 74HCseries FPGA. Its output frequency should not exceed 60MHz. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The object belongs to the 74HC107 family. A voltage of 4.5V is used as the power supply for this D latch. Input capacitance of this device is 10pF farads. Devices in the HC/UHfamily are electronic devices. The electronic part is mounted in the way of Surface Mount. This board is designed with 14pins on it. In this device, the clock edge trigger type is Negative Edge. The RS flip flops belongs to FF/Latches base part number. Vsup reaches its maximum value at 6V. Normal operation requires a supply voltage (Vsup) above 2V. With an output current of 5.2mA, this device offers maximum design flexibility. There is 4μA quiescent current consumption by it. 2is the number of channels.
CD74HC107M Features
Tube package
74HC series
14 pins
CD74HC107M Applications
There are a lot of Texas Instruments CD74HC107M Flip Flops applications.
- Frequency division
- Individual Asynchronous Resets
- Common Clocks
- Asynchronous counter
- QML qualified product
- Pattern generators
- ESD performance
- Data transfer
- ESCC
- CMOS Process
