Parameters |
Mounting Type |
Through Hole |
Package / Case |
16-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Series |
74HC |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
16 |
Type |
JK Type |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Supply Voltage |
5V |
Function |
Set(Preset) and Reset |
Qualification Status |
COMMERCIAL |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
60MHz |
Family |
HC/UH |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
5.2mA 5.2mA |
Output Polarity |
COMPLEMENTARY |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
31ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
fmax-Min |
60 MHz |
RoHS Status |
Non-RoHS Compliant |
CD74HC109E Overview
The package is in the form of 16-DIP (0.300, 7.62mm). It is contained within the Tubepackage. As configured, the output uses Differential. It is configured with the trigger Positive Edge. It is mounted in the way of Through Hole. It operates with a supply voltage of 2V~6V. In the operating environment, the temperature is -55°C~125°C TA. JK Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74HCseries FPGA. You should not exceed 60MHzin the output frequency of the device. The element count is 2 . This process consumes 4μA quiescents. The number of terminations is 16. A voltage of 5V is used as the power supply for this D latch. JK flip flop input capacitance is 10pF farads. Devices in the HC/UHfamily are electronic devices. As soon as 6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation.
CD74HC109E Features
Tube package
74HC series
CD74HC109E Applications
There are a lot of Rochester Electronics, LLC CD74HC109E Flip Flops applications.
- Balanced Propagation Delays
- Modulo – n – counter
- Registers
- Digital electronics systems
- Shift registers
- Synchronous counter
- Frequency Divider circuits
- Individual Asynchronous Resets
- High Performance Logic for test systems
- Memory