CD74HC109ME4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74HC109 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 175 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 14 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.006 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 53 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74HC109ME4 Overview
In the form of 16-SOIC (0.154, 3.90mm Width), it has been packaged. As part of the package Tube, it is embedded. There is a Differentialoutput configured with it. This trigger is configured to use Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 2V~6V. In the operating environment, the temperature is -55°C~125°C TA. JK Typedescribes this flip flop. JK flip flop belongs to the 74HCseries of FPGAs. Its output frequency should not exceed 60MHz. 16terminations have occurred. The 74HC109family includes it. A voltage of 4.5V is used to power it. The input capacitance of this T flip flop is 10pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The electronic device belongs to the HC/UHfamily. Surface Mount mounts this electronic component. 16pins are included in its design. A Positive Edgeclock edge trigger is used in this device. The part is included in FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 6V. The supply voltage (Vsup) should be maintained above 2V for normal operation. Using 2 circuits, it is highly flexible. With a current output of 5.2mA , it offers maximum design flexibility. In terms of quiescent current, it consumes 4μA .
CD74HC109ME4 Features
Tube package
74HC series
16 pins
CD74HC109ME4 Applications
There are a lot of Texas Instruments CD74HC109ME4 Flip Flops applications.
- Counters
- Synchronous counter
- Data Synchronizers
- Set-reset capability
- Communications
- Memory
- Registers
- Shift registers
- Modulo – n – counter
- Balanced 24 mA output drivers
