CD74HC109MG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Base Part Number | 74HC109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 175 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 14 ns |
| Family | HC/UH |
| Logic Function | AND, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.006 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 53 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74HC109MG4 Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. A package named Tubeincludes it. T flip flop uses Differentialas its output configuration. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 2V~6Vis required for its operation. It is operating at -55°C~125°C TA. The type of this D latch is JK Type. In terms of FPGAs, it belongs to the 74HC series. Its output frequency should not exceed 60MHz. A total of 16terminations have been recorded. The 74HC109family includes it. Power is supplied from a voltage of 4.5V volts. Input capacitance of this device is 10pF farads. A device of this type belongs to the family of HC/UH. Surface Mount mounts this electronic component. This board is designed with 16pins on it. There is a clock edge trigger type of Positive Edgeon this device. This device is part of the FF/Latchesbase part number family. As soon as 6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation. Using 2 circuits, it is highly flexible. As a result of its output current of 5.2mA, it is very flexible in terms of design. It consumes a total of 4μA quiescent current at any given time.
CD74HC109MG4 Features
Tube package
74HC series
16 pins
CD74HC109MG4 Applications
There are a lot of Texas Instruments CD74HC109MG4 Flip Flops applications.
- Supports Live Insertion
- Communications
- Control circuits
- Consumer
- Parallel data storage
- Data Synchronizers
- EMI reduction circuitry
- Set-reset capability
- Single Down Count-Control Line
- Patented noise
