CD74HC112M96
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Base Part Number | 74HC112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 270 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 14 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.006 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 53 ns |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74HC112M96 Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. It is included in the package Cut Tape (CT). It is configured with Differentialas an output. It is configured with the trigger Negative Edge. There is an electronic component mounted in the way of Surface Mount. With a supply voltage of 2V~6V volts, it operates. In the operating environment, the temperature is -55°C~125°C TA. JK Typedescribes this flip flop. This type of FPGA is a part of the 74HC series. It should not exceed 60MHzin terms of its output frequency. 16terminations have occurred. You can search similar parts based on 74HC112. It is powered by a voltage of 4.5V . JK flip flop input capacitance is 10pF farads. Electronic devices of this type belong to the HC/UHfamily. There is an electronic part that is mounted in the way of Surface Mount. There are 16pins on it. This device has the clock edge trigger type of Negative Edge. It is included in FF/Latches. 6Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 2V. 2 circuits are used to achieve its superior flexibility. As a result of its reliability, this D flip flop is ideally suited for TR. Featuring the maximum design flexibility, it has an output current of 5.2mA . It consumes 4μA current.
CD74HC112M96 Features
Cut Tape (CT) package
74HC series
16 pins
CD74HC112M96 Applications
There are a lot of Texas Instruments CD74HC112M96 Flip Flops applications.
- Data Synchronizers
- Balanced 24 mA output drivers
- Synchronous counter
- Modulo – n – counter
- Single Down Count-Control Line
- Event Detectors
- Circuit Design
- Computing
- Frequency Divider circuits
- Test & Measurement
