CD74HC112PWE4
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 16-TSSOP |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | JK Type |
| Voltage - Supply | 2V~6V |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Clock Frequency | 60MHz |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| RoHS Status | ROHS3 Compliant |
CD74HC112PWE4 Overview
16-TSSOP (0.173, 4.40mm Width)is the packaging method. D flip flop is embedded in the Tube package. In the configuration, Differentialis used as the output. Negative Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. A voltage of 2V~6Vis required for its operation. -55°C~125°C TAis the operating temperature. This D latch has the type JK Type. In FPGA terms, D flip flop is a type of 74HCseries FPGA. You should not exceed 60MHzin its output frequency. A total of 2elements are contained within it. This process consumes 4μA quiescents. There is 10pF input capacitance for this T flip flop.
CD74HC112PWE4 Features
Tube package
74HC series
CD74HC112PWE4 Applications
There are a lot of Rochester Electronics, LLC CD74HC112PWE4 Flip Flops applications.
- Latch-up performance
- Parallel data storage
- Buffer registers
- Circuit Design
- Memory
- ESD protection
- Convert a momentary switch to a toggle switch
- Registers
- Data Synchronizers
- Frequency division
