Parameters |
Input Capacitance |
10pF |
Schmitt Trigger |
No |
Power Supply Current-Max (ICC) |
0.04mA |
Clock Edge Trigger Type |
Negative Edge |
Height |
1.2mm |
Length |
5mm |
Width |
4.4mm |
Thickness |
1mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
16 |
Weight |
61.887009mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Cut Tape (CT) |
Series |
74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
ECCN Code |
EAR99 |
Type |
JK Type |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
4.5V |
Base Part Number |
74HC112 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
5.2mA |
Clock Frequency |
60MHz |
Propagation Delay |
175 ns |
Quiescent Current |
4μA |
Turn On Delay Time |
14 ns |
Family |
HC/UH |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.006 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
30ns @ 6V, 50pF |
Prop. Delay@Nom-Sup |
53 ns |
Trigger Type |
Negative Edge |
CD74HC112PWR Overview
The item is packaged in 16-TSSOP (0.173, 4.40mm Width)cases. You can find it in the Cut Tape (CT)package. The output it is configured with uses Differential. This trigger is configured to use Negative Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 2V~6Vis used as the supply voltage. In the operating environment, the temperature is -55°C~125°C TA. It belongs to the type JK Typeof flip flops. In FPGA terms, D flip flop is a type of 74HCseries FPGA. You should not exceed 60MHzin the output frequency of the device. Terminations are 16. JK flip flop belongs to 74HC112 family. A voltage of 4.5V provides power to the D latch. JK flip flop input capacitance is 10pF farads. It belongs to the family of electronic devices known as HC/UH. A part of the electronic system is mounted in the way of Surface Mount. The 16pins are designed into the board. There is a clock edge trigger type of Negative Edgeon this device. It is part of the FF/Latchesbase part number family. 6Vis the maximum supply voltage (Vsup). A normal operating voltage (Vsup) should remain above 2V. Its superior flexibility is attributed to its use of 2 circuits. On the basis of its reliable performance, this D flip flop is well suited for use with TR. With an output current of 5.2mA, it is possible to design the device in any way you want. There is 4μA quiescent current consumption by it.
CD74HC112PWR Features
Cut Tape (CT) package
74HC series
16 pins
CD74HC112PWR Applications
There are a lot of Texas Instruments CD74HC112PWR Flip Flops applications.
- Bus hold
- Modulo – n – counter
- Balanced Propagation Delays
- Computers
- Balanced 24 mA output drivers
- Dynamic threshold performance
- Counters
- Matched Rise and Fall
- Functionally equivalent to the MC10/100EL29
- Divide a clock signal by 2 or 4