CD74HC564M
| Parameters | |
|---|---|
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Base Part Number | 74HC564 |
| Function | Standard |
| Output Type | Tri-State, Inverted |
| Number of Elements | 1 |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Power Supplies | 2/6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Channels | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 7.8mA |
| Number of Bits | 8 |
| Clock Frequency | 60MHz |
| Propagation Delay | 165 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 13 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 28ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
CD74HC564M Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). It is contained within the Tubepackage. T flip flop uses Tri-State, Invertedas the output. In the configuration of the trigger, Positive Edgeis used. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of 2V~6V. A temperature of -55°C~125°C TAis used in the operation. D-Typedescribes this flip flop. JK flip flop is a part of the 74HCseries of FPGAs. Its output frequency should not exceed 60MHz. D latch consists of 1 elements. A total of 20 terminations have been made. It is a member of the 74HC564 family. A voltage of 4.5V is used as the power supply for this D latch. A 10pFfarad input capacitance is provided by this T flip flop. Devices in the HC/UHfamily are electronic devices. In this case, the electronic component is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. This device has Positive Edgeas its clock edge trigger type. It is part of the FF/Latchesbase part number family. 8bits are used in its design. There is a 6Vmaximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 2V. A total of 2/6V power supplies are needed to run it. There are 2 ports embedded in the flip flops. The output current of 7.8mA makes it feature maximum design flexibility. There are 3 output lines on it. It consumes 8μA current. There are 8 channels available.
CD74HC564M Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
CD74HC564M Applications
There are a lot of Texas Instruments CD74HC564M Flip Flops applications.
- Asynchronous counter
- QML qualified product
- ESD performance
- Clock pulse
- Patented noise
- Latch
- Digital electronics systems
- Divide a clock signal by 2 or 4
- Differential Individual
- Functionally equivalent to the MC10/100EL29
