CD74HC73M96
| Parameters | |
|---|---|
| Output Current | 5.2A |
| Clock Frequency | 60MHz |
| Propagation Delay | 13 ns |
| Turn On Delay Time | 13 ns |
| Family | HC/UH |
| Logic Function | Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.006 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 28ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 40 ns |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Base Part Number | 74HC73 |
| Function | Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
CD74HC73M96 Overview
It is embeded in 14-SOIC (0.154, 3.90mm Width) case. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Differential. This trigger is configured to use Negative Edge. Surface Mountis occupied by this electronic component. With a supply voltage of 2V~6V volts, it operates. Currently, the operating temperature is -55°C~125°C TA. JK Typeis the type of this D latch. It is a type of FPGA belonging to the 74HC series. It should not exceed 60MHzin its output frequency. T flip flop consumes 4μA quiescent energy. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74HC73 family contains it. Power is provided by a 4.5V supply. Input capacitance of this device is 10pF farads. It is a member of the HC/UHfamily of D flip flop. There is an electronic part that is mounted in the way of Surface Mount. As you can see from the design, it has pins with 14. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Negative Edge. This part is included in FF/Latches. The maximal supply voltage (Vsup) reaches 6V. For normal operation, the supply voltage (Vsup) should be kept above 2V. The superior flexibility of this circuit is achieved by using 2 circuits. As a result of its reliable performance, this T flip flop is suitable for TR. In addition to its maximum design flexibility, the output current of the T flip flop is 5.2A.
CD74HC73M96 Features
Tape & Reel (TR) package
74HC series
14 pins
CD74HC73M96 Applications
There are a lot of Texas Instruments CD74HC73M96 Flip Flops applications.
- Shift Registers
- ATE
- 2 – Bit synchronous counter
- Safety Clamp
- Frequency Divider circuits
- Common Clocks
- Storage registers
- Differential Individual
- Instrumentation
- Communications
