Parameters |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74HCT |
JESD-609 Code |
e4 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Termination |
SMD/SMT |
Type |
JK Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74HCT109 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
4mA |
Clock Frequency |
54MHz |
Propagation Delay |
40 ns |
Turn On Delay Time |
17 ns |
Family |
HCT |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
40ns @ 4.5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Clock Edge Trigger Type |
Positive Edge |
Length |
9.9mm |
Width |
3.9mm |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Contains Lead |
CD74HCT109MT Overview
In the form of 16-SOIC (0.154, 3.90mm Width), it has been packaged. It is contained within the Tape & Reel (TR)package. The output it is configured with uses Differential. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. In the operating environment, the temperature is -55°C~125°C TA. A flip flop of this type is classified as a JK Type. In FPGA terms, D flip flop is a type of 74HCTseries FPGA. Its output frequency should not exceed 54MHz. T flip flop consumes 4μA quiescent energy. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74HCT109 family. It is powered from a supply voltage of 5V. Its input capacitance is 10pF farads. An electronic device belonging to the family HCTcan be found here. Surface Mount mounts this electronic component. A total of 16pins are provided on this board. Its clock edge trigger type is Positive Edge. It is included in FF/Latches. Its flexibility is enhanced by 2 circuits. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The D latch runs on a voltage of 5V volts. High efficiency requires the supply voltage to be maintained at 5V. With a current output of 4mA , it offers maximum design flexibility.
CD74HCT109MT Features
Tape & Reel (TR) package
74HCT series
16 pins
5V power supplies
CD74HCT109MT Applications
There are a lot of Texas Instruments CD74HCT109MT Flip Flops applications.
- Single Down Count-Control Line
- Buffer registers
- 2 – Bit synchronous counter
- CMOS Process
- Test & Measurement
- Common Clocks
- Count Modes
- Frequency Divider circuits
- Circuit Design
- Memory