CLVC374AQPWRG4Q1
| Parameters | |
|---|---|
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | Automotive, AEC-Q100, 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 9.5 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
CLVC374AQPWRG4Q1 Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~3.6V. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. It belongs to the Automotive, AEC-Q100, 74LVCseries of FPGAs. This D flip flop should not have a frequency greater than 100MHz. A total of 1elements are present in it. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 74LVC374family make up this object. It is powered by a voltage of 2.7V . Its input capacitance is 4pF farads. This D flip flop belongs to the family of LVC/LCX/Z. There is an electronic part that is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 20. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latches. The design is based on 8bits. Vsup reaches its maximum value at 3.6V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. As a result of its reliability, this D flip flop is ideally suited for TR. The D latch runs on a voltage of 3.3V volts. A D flip flop with 2embedded ports is available. This input has 8lines in it. In terms of quiescent current, it consumes 10μA .
CLVC374AQPWRG4Q1 Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74LVC series
20 pins
8 Bits
3.3V power supplies
CLVC374AQPWRG4Q1 Applications
There are a lot of Texas Instruments CLVC374AQPWRG4Q1 Flip Flops applications.
- Reduced system switching noise
- Memory
- Frequency Divider circuits
- ESD protection
- ESCC
- Communications
- CMOS Process
- ATE
- EMI reduction circuitry
- Test & Measurement
