Parameters |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
56-TFSOP (0.240, 6.10mm Width) |
Number of Pins |
56 |
Weight |
249.986095mg |
Operating Temperature |
-40°C~85°C |
Packaging |
Tape & Reel (TR) |
Series |
74LVTH |
JESD-609 Code |
e4 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
56 |
ECCN Code |
EAR99 |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Number of Functions |
1 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVTH16835 |
Pin Count |
56 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
3.3V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Supply Voltage-Min (Vsup) |
2.7V |
Number of Channels |
18 |
Number of Circuits |
18-Bit |
Number of Ports |
2 |
Output Current |
64mA |
Max Supply Current |
5mA |
Number of Bits |
18 |
Propagation Delay |
2.6 ns |
Quiescent Current |
5mA |
Turn On Delay Time |
6.3 ns |
Family |
LVT |
Logic Function |
Transceiver |
Direction |
Unidirectional |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Logic Type |
Universal Bus Driver |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Contains Lead |
CLVTH16835IDGGREP Overview
The package 56-TFSOP (0.240, 6.10mm Width) includes it. In other words, it is packaged in a manner similar to Tape & Reel (TR). A 18-Bit circuit achieves its superior flexibility by using 18-Bit components. There is a logic type Universal Bus Driver associated with this electrical device. The electronic part is mounted in Surface Mount-direction. -40°C~85°C should be higher than the operating temperature. As 32mA 64mA offers a high/low output current, it is versatile in terms of design. It belongs to the 74LVTH series of FPGAs. 2.7V~3.6V is the supply voltage. It belongs to 74LVTH16835 family. The 56 termination is a practice in which a transmission line is terminated with an impedance matching device at the end of the line in order to match the characteristic impedance of the line. The supply voltage should be kept above 3.3V for normal operation. In addition, it is equipped with a 56 pin count. With 18 Bits, you can design electronic parts in a very flexible way. 2 terminations, on the other hand, are the practice of terminating a transmission line with a device that matches its characteristic impedance. The electronic part is mounted in Surface Mount-direction. A 56-pin is used for its design. Devices in this family are known as LVT devices. Upon reaching 3.6V, Vsup reaches its maximal value. A higher voltage supply (Vsup) should be used. In this case, it is made up of 1 elements. Because of its output current of 64mA, it offers maximum design flexibility. 18 is growing/weakening in terms of channels. 3.3V is the supply voltage for this electrical part. In this case, 5mA of quiescent current is consumed without being affected by any outside forces. During operation, its maximal current reaches 5mA.
CLVTH16835IDGGREP Features
56-TFSOP (0.240, 6.10mm Width) package
74LVTH series
74LVTH16835 family
56 pin count
56 pins
1 elements
CLVTH16835IDGGREP Applications
There are a lot of Texas Instruments CLVTH16835IDGGREP Universal Bus Functions applications.
- Urban rail vehicle
- Electric car
- Printer IC
- Electronic Points of Sale
- Overvoltage and undervoltage protection
- Photovoltaic system
- Electricity for military and civilian life in areas without electricity
- Electric shaver
- Light-activated burglar alarm
- CD player