CY37064P84-125JXC
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Number of Pins | 84 |
| Supplier Device Package | 84-PLCC (29.31x29.31) |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Published | 2012 |
| Series | Ultra37000™ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Frequency | 125MHz |
| Base Part Number | CY37064 |
| Operating Supply Voltage | 5V |
| Programmable Type | In-System Reprogrammable™ (ISR™) CMOS |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 69 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Number of Logic Elements/Cells | 4 |
| Number of Gates | 2000 |
| Max Frequency | 125MHz |
| Number of Programmable I/O | 69 |
| Number of Logic Blocks (LABs) | 4 |
| Number of Macro Cells | 64 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 10ns |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CY37064P84-125JXC Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is contained in package [0].The device has 69inputs and outputs.It is recommended that the chip be packaged by Tube.Ensure its reliability by operating at [0].It is recommended that the chip be mounted by Surface Mount.As part of the Ultra37000?series, it is a type of FPGA.CY37064contains its related parts.There are 2000 gates, which are devices that acts as a building block for digital circuits. If high efficiency is to be achieved, the supply voltage should be maintained at [0].In this case, EEPROMwill be used to store the data.Surface Mountis the mounting point of this electronic part.The device is designed with pins [0].In this case, the maximum supply voltage is 5.25V.A minimum supply voltage of 4.75V is required for this device to operate.A total of 69programmable I/Os are available.This can be achieved at a frequency of 125MHz.The maximum frequency should not exceed 125MHz.The operating temperature should be higher than 0°C.It is recommended to keep the operating temperature below 70°C.It consists of 4 logic blocks (LABs).Basic building blocks have 4logic elements.
CY37064P84-125JXC Features
84-LCC (J-Lead) package
69 I/Os
The operating temperature of 0°C~70°C TA
84 pins
4 logic blocks (LABs)
CY37064P84-125JXC Applications
There are a lot of Cypress Semiconductor Corp CY37064P84-125JXC CPLDs applications.
- I2C BUS INTERFACE
- Configurable Addressing of I/O Boards
- Interface bridging
- Preset swapping
- I/O PORTS (MCU MODULE)
- Programmable power management
- INTERRUPT SYSTEM
- Multiple Clock Source Selection
- Custom state machines
- Address decoders
