Parameters |
Mount |
Surface Mount |
Package / Case |
PQFP |
Number of Pins |
100 |
JESD-609 Code |
e0 |
Number of Terminations |
100 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
225 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Frequency |
40MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
100 |
Operating Supply Voltage |
5V |
Power Supplies |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
64 |
Memory Type |
EPROM |
Propagation Delay |
35 ns |
Turn On Delay Time |
35 ns |
Frequency (Max) |
40MHz |
Organization |
19 DEDICATED INPUTS, 64 I/O |
Programmable Logic Type |
OT PLD |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
NO |
Number of Dedicated Inputs |
19 |
In-System Programmable |
NO |
Height Seated (Max) |
3.4mm |
Length |
20mm |
Width |
14mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
CY7C346B-35NC Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is packaged with PQFP.In this case, there are 64 I/Os programmed.It is programmed to terminate devices at [0].There is a QUADterminal position on the electrical part in question.Power is provided by a supply voltage of 5V volts.This part is in the family [0].There are 100pins on the chip.Optimal efficiency requires a supply voltage of [0].In order to store data, EPROMis used.A Surface Mountis mounted on this electronic component.There are 100 pins on the device.A maximum supply voltage of 5.25Vis used in its operation.It is powered by 4.75Vas its minimum supply voltage.This device runs on 5Vvolts of electricity.It is possible to achieve a frequency of 40MHz.It is recommended that the operating temperature be greater than 0°C.Temperatures should be lower than 70°C when operating.The system consists of 8 logic blocks (LABs).Input signals are detected by 19dedicated inputs.A maximum frequency of less than 40MHzis recommended.Programmable logic types can be divided into OT PLD.
CY7C346B-35NC Features
PQFP package
64 I/Os
100 pin count
100 pins
5V power supplies
8 logic blocks (LABs)
CY7C346B-35NC Applications
There are a lot of Cypress Semiconductor CY7C346B-35NC CPLDs applications.
- Page register
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- State machine control
- State machine design
- Field programmable gate
- DMA control
- Bootloaders for FPGAs
- White goods (Washing, Cold, Aircon ,...)
- Auxiliary Power Supply Isolated and Non-isolated
- Parity generators