Parameters |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
84 |
JESD-609 Code |
e0 |
Number of Terminations |
84 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Pin Count |
84 |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
64 |
Memory Type |
FLASH |
Clock Frequency |
50MHz |
Propagation Delay |
20 ns |
Turn On Delay Time |
20 ns |
Number of Logic Blocks (LABs) |
4 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
Number of Dedicated Inputs |
1 |
In-System Programmable |
YES |
Height Seated (Max) |
5.08mm |
Length |
29.3116mm |
Width |
29.3116mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
CY7C373I-66JC Overview
The mobile phone network has 64 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is embedded in the PLCC package.It is programmed with 64 I/Os.It is programmed that device terminations will be 84 .The terminal position of this electrical component is QUAD.Power is provided by a supply voltage of 5V volts.It is a part of the family [0].It has 84pins programmed.The supply voltage should be maintained at 5V for high efficiency.It is recommended to store data in [0].In this case, it is mounted by Surface Mount.84pins are included in its design.There is a maximum supply voltage of 5.25Vwhen the device is operating.Despite its minimal supply voltage of [0], it is capable of operating.In order to operate properly, the operating temperature should be higher than 0°C.A temperature below 70°Cshould be used as the operating temperature.There are 4logic blocks (LABs) that make up its basic building block.Input signals are detected by 1dedicated inputs.clock frequency should not exceed [0].
CY7C373I-66JC Features
PLCC package
64 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
CY7C373I-66JC Applications
There are a lot of Cypress Semiconductor CY7C373I-66JC CPLDs applications.
- Digital systems
- I2C BUS INTERFACE
- PULSE WIDTH MODULATION (PWM)
- Bootloaders for FPGAs
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Multiple DIP Switch Replacement
- POWER-SAVING MODES
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- ON-CHIP OSCILLATOR CIRCUIT
- Software-driven hardware configuration