DMP2104LP-7
| Parameters | |
|---|---|
| Threshold Voltage | -1V |
| Gate to Source Voltage (Vgs) | 12V |
| Drain to Source Breakdown Voltage | -20V |
| Height | 480μm |
| Length | 1.4mm |
| Width | 1.1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 3-XDFN |
| Number of Pins | 3 |
| Transistor Element Material | SILICON |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Tape & Reel (TR) |
| Published | 2007 |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 3 |
| ECCN Code | EAR99 |
| Resistance | 240mOhm |
| Additional Feature | HIGH RELIABILITY |
| Subcategory | Other Transistors |
| Technology | MOSFET (Metal Oxide) |
| Terminal Position | BOTTOM |
| Peak Reflow Temperature (Cel) | 260 |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 3 |
| Number of Elements | 1 |
| Number of Channels | 1 |
| Power Dissipation-Max | 500mW Ta |
| Element Configuration | Single |
| Operating Mode | ENHANCEMENT MODE |
| Power Dissipation | 500mW |
| Case Connection | DRAIN |
| FET Type | P-Channel |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 150m Ω @ 950mA, 4.5V |
| Vgs(th) (Max) @ Id | 1V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 320pF @ 16V |
| Current - Continuous Drain (Id) @ 25°C | 1.5A Ta |
| Drain to Source Voltage (Vdss) | 20V |
| Drive Voltage (Max Rds On,Min Rds On) | 1.8V 4.5V |
| Vgs (Max) | ±12V |
| Continuous Drain Current (ID) | 1.5A |
See Relate Datesheet
