Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
44 |
Published |
1998 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
44 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) - annealed |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
245 |
Supply Voltage |
3.3V |
Frequency |
166.67MHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
44 |
Operating Supply Voltage |
3.3V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
34 |
Memory Type |
EEPROM |
Propagation Delay |
7.5 ns |
Turn On Delay Time |
7.5 ns |
Frequency (Max) |
222.2MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
1250 |
Number of Programmable I/O |
34 |
Number of Logic Blocks (LABs) |
4 |
Speed Grade |
7 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Length |
16.5862mm |
Width |
16.5862mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
EPM3064ALC44-7N Overview
In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.In the PLCCpackage, you will find it.The device is programmed with 34 I/Os.It is programmed to terminate devices at [0].This electrical component has a terminal position of 0.The power source is powered by 3.3Vvolts.The part belongs to Programmable Logic Devices family.The chip is programmed with 44 pins.When using this device, YESis also available.1250gates are used to construct digital circuits.The supply voltage should be maintained at 3.3V for high efficiency.Data storage is performed using [0].This device is mounted by Surface Mount.The device has a pinout of [0].A voltage of 3.6V is the maximum supply voltage for this device.It is powered by 3Vas its minimum supply voltage.There are a total of 34 Programmable I/Os.It is possible to achieve a frequency of 166.67MHz.It is recommended that the operating temperature be higher than 0°C.Temperatures should be lower than 70°C when operating.Its basic building block is composed of 4 logic blocks (LABs).If the maximal frequency is less than [0], it should be lower than that.Programmable logic types can be divided into EE PLD.
EPM3064ALC44-7N Features
PLCC package
34 I/Os
44 pin count
44 pins
4 logic blocks (LABs)
EPM3064ALC44-7N Applications
There are a lot of Altera EPM3064ALC44-7N CPLDs applications.
- Dedicated input registers
- D/T registers and latches
- Digital designs
- Custom shift registers
- POWER-SAVING MODES
- Configurable Addressing of I/O Boards
- Power up sequencing
- Pattern recognition
- I2C BUS INTERFACE
- Reset swapping