EPM3064ALI44-10N
| Parameters | |
|---|---|
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1.27mm |
| Reach Compliance Code | unknown |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 44 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 34 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 222.2MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 34 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Length | 16.5862mm |
| Width | 16.5862mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 44 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 44 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) - annealed |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
EPM3064ALI44-10N Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a PLCC package containing it.It is equipped with 34I/O ports.It is programmed that device terminations will be 44 .The terminal position of this electrical component is QUAD.It is powered from a supply voltage of 3.3V.This part is in the family [0].There are 44 pins on the chip.This device is also capable of displaying [0].The 1250gates serve as building blocks for digital circuits.Optimal efficiency requires a supply voltage of [0].Data storage is performed using [0].The electronic part is mounted by Surface Mount.44pins are included in its design.It operates with the maximal supply voltage of 3.6V.A minimum supply voltage of 3V is required for this device to operate.There are a total of 34 Programmable I/Os.This frequency is 125MHz.It is recommended that the operating temperature be greater than -40°C.It is recommended that the operating temperature be lower than 85°C.It consists of 4 logic blocks (LABs).A maximum frequency of less than 222.2MHzis recommended.This kind of FPGA is composed of EE PLD.
EPM3064ALI44-10N Features
PLCC package
34 I/Os
44 pin count
44 pins
4 logic blocks (LABs)
EPM3064ALI44-10N Applications
There are a lot of Altera EPM3064ALI44-10N CPLDs applications.
- PULSE WIDTH MODULATION (PWM)
- INTERRUPT SYSTEM
- Portable digital devices
- I/O PORTS (MCU MODULE)
- ToR/Aggregation/Core Switch and Router
- I/O expansion
- DDC INTERFACE
- State machine design
- Storage Cards and Storage Racks
- ON-CHIP OSCILLATOR CIRCUIT
