Parameters |
Mount |
Surface Mount |
Package / Case |
BGA |
Number of Pins |
256 |
Published |
1998 |
JESD-609 Code |
e0 |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
256 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
3.3V |
Terminal Pitch |
1mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Pin Count |
256 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
2.5/3.33.3V |
Temperature Grade |
COMMERCIAL |
Supply Voltage-Min (Vsup) |
3V |
Number of I/O |
98 |
Propagation Delay |
10 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
3.5mm |
Length |
17mm |
Width |
17mm |
RoHS Status |
RoHS Compliant |
EPM3128AFC256-10 Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).There is a BGA package containing it.As a result, it has 98 I/O ports programmed.Terminations of devices are set to [0].There is a BOTTOMterminal position on the electrical part in question.It is powered from a supply voltage of 3.3V.It is included in Programmable Logic Devices.It is equipped with 256 pin count.This device can also display [0].There are 2500 gates, which are devices that acts as a building block for digital circuits. Surface Mountis the mounting point of this electronic part.There are 256pins on it.It operates from 2.5/3.33.3V power supplies.There is a maximum supply voltage (Vsup) of 3.6V.The operating temperature should be higher than 0°C.Temperatures should not exceed 70°C.The logic block consists of 8 l logic blocks (LABs).Voltage supply (Vsup) should be higher than 3V.It is possible to classify programmable logic as EE PLD.
EPM3128AFC256-10 Features
BGA package
98 I/Os
256 pin count
256 pins
2.5/3.33.3V power supplies
8 logic blocks (LABs)
EPM3128AFC256-10 Applications
There are a lot of Altera EPM3128AFC256-10 CPLDs applications.
- Storage Cards and Storage Racks
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Software Configuration of Add-In Boards
- LED Lighting systems
- Programmable polarity
- State machine design
- Discrete logic functions
- POWER-SAVING MODES
- Digital designs
- Wide Vin Industrial low power SMPS