EPM3128AFI256-10
| Parameters | |
|---|---|
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 98 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 192.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 98 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | RoHS Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
EPM3128AFI256-10 Overview
A mobile phone network consists of 128macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).There is a FBGA package containing it.It is equipped with 98I/O ports.There are 256 terminations programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.An electrical supply voltage of 3.3V is used to power it.It is included in Programmable Logic Devices.There are 256pins on the chip.This device is also capable of displaying [0].There are 2500 gates, which are devices that acts as a building block for digital circuits. If high efficiency is to be achieved, the supply voltage should be maintained at [0].In order to store data, EEPROMis used.In this case, it is mounted by Surface Mount.The device is designed with pins [0].A maximum voltage of 3.6Vis required for operation.It is powered by 3Vas its minimum supply voltage.There are a total of 98 Programmable I/Os.There can be 125MHz frequency achieved.In order to operate properly, the operating temperature should be higher than -40°C.It is recommended to keep the operating temperature below 85°C.It is composed of 8 logic blocks (LABs).It is recommended that the maximal frequency be lower than 192.3MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM3128AFI256-10 Features
FBGA package
98 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM3128AFI256-10 Applications
There are a lot of Altera EPM3128AFI256-10 CPLDs applications.
- Dedicated input registers
- Protection relays
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Code converters
- Address decoders
- Portable digital devices
- Configurable Addressing of I/O Boards
- Digital multiplexers
- Random logic replacement
