EPM3128AFI256-10N
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Reach Compliance Code | unknown |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 98 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 192.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 98 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | RoHS Compliant |
EPM3128AFI256-10N Overview
Currently, there are 128 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is embedded in the FBGA package.The device is programmed with 98 I/Os.Terminations of devices are set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.The power supply voltage is 3.3V.This part is in the family [0].Chips are programmed with 256 pins.The device can also be used to find [0].As a building block for digital circuits, there are 2500gates.If high efficiency is to be achieved, the supply voltage should be maintained at [0].For data storage, EEPROMis adopted.In this case, it is mounted by Surface Mount.This board has 256 pins.There is a maximum supply voltage of 3.6Vwhen the device is operating.In order for it to operate, a supply voltage of 3Vis required.A total of 98 Programmable I/Os are available.You can achieve 125MHzfrequencies.Operating temperatures should be higher than 0°C.A temperature below 85°Cshould be used as the operating temperature.The program consists of 8 logic blocks (LABs).A maximum frequency of less than 192.3MHzis recommended.There are several types of programmable logic that can be categorized as EE PLD.
EPM3128AFI256-10N Features
FBGA package
98 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM3128AFI256-10N Applications
There are a lot of Altera EPM3128AFI256-10N CPLDs applications.
- Boolean function generators
- Power Meter SMPS
- Timing control
- Protection relays
- Handheld digital devices
- Digital multiplexers
- Power automation
- Storage Cards and Storage Racks
- DDC INTERFACE
- LED Lighting systems
