EPM3256AFC256-10
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 161 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 126.6MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Programmable I/O | 161 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | RoHS Compliant |
EPM3256AFC256-10 Overview
There are 256 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is part of the FBGA package.It is equipped with 161I/O ports.There is a 256terminations set on devices.The terminal position of this electrical component is BOTTOM.There is 3.3V voltage supply for this device.There is a part included in Programmable Logic Devices.There are 256 pins on the chip.It is also possible to find YESwhen using this device.In digital circuits, 5000gates serve as building blocks.For high efficiency, the supply voltage should be maintained at [0].Data storage is performed using [0].Surface Mountis the mounting point of this electronic part.256pins are included in its design.A voltage of 3.6V is the maximum supply voltage for this device.It is powered by 3Vas its minimum supply voltage.A total of 161 Programmable I/Os are available.This frequency is 125MHz.The operating temperature should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.It is composed of 16 logic blocks (LABs).The maximal frequency should be lower than 126.6MHz.Programmable logic types are divided into EE PLD.
EPM3256AFC256-10 Features
FBGA package
161 I/Os
256 pin count
256 pins
16 logic blocks (LABs)
EPM3256AFC256-10 Applications
There are a lot of Altera EPM3256AFC256-10 CPLDs applications.
- Complex programmable logic devices
- Code converters
- Dedicated input registers
- Page register
- Power Meter SMPS
- I/O PORTS (MCU MODULE)
- Battery operated portable devices
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Synchronous or asynchronous mode
- Boolean function generators
