EPM3256ATI144-10N
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 144 |
| Weight | 1.319103g |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 144 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) - annealed |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 144 |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 116 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 126.6MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.6mm |
| Length | 20mm |
| Width | 20mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM3256ATI144-10N Overview
There are 256 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a TQFP package containing it.It is programmed with 116 I/Os.The termination of a device is set to [0].QUADis the terminal position of this electrical part.Power is provided by a supply voltage of 3.3V volts.It is a part of family [0].With 144pins programmed, the chip is ready to use.Additionally, this device is capable of displaying [0].5000gates are used to construct digital circuits.In order to maintain high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].The electronic part is mounted by Surface Mount.144pins are included in its design.There is a maximum supply voltage of 3.6Vwhen the device is operating.In order for it to operate, a supply voltage of 3Vis required.In this case, 125MHzis the frequency that can be achieved.It is recommended that the operating temperature exceeds -40°C.Temperatures should be lower than 85°C when operating.16logic blocks (LABs) make up this circuit.It is recommended that the maximal frequency be less than 0.Programmable logic types are divided into EE PLD.
EPM3256ATI144-10N Features
TQFP package
116 I/Os
144 pin count
144 pins
16 logic blocks (LABs)
EPM3256ATI144-10N Applications
There are a lot of Altera EPM3256ATI144-10N CPLDs applications.
- ON-CHIP OSCILLATOR CIRCUIT
- Software-driven hardware configuration
- Multiple Clock Source Selection
- STANDARD SERIAL INTERFACE UART
- I/O expansion
- Field programmable gate
- POWER-SAVING MODES
- Power Meter SMPS
- Digital systems
- LED Lighting systems
