EPM5128LC-1
| Parameters | |
|---|---|
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 68 |
| JESD-30 Code | S-PQCC-J68 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 52 |
| Clock Frequency | 50MHz |
| Propagation Delay | 40 ns |
| Organization | 7 DEDICATED INPUTS, 52 I/O |
| Programmable Logic Type | OT PLD |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 7 |
| In-System Programmable | NO |
| RoHS Status | Non-RoHS Compliant |
| Surface Mount | YES |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 68 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
EPM5128LC-1 Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The device has 52inputs and outputs.68terminations are programmed into the device.This electrical component has a terminal position of 0.A voltage of 5Vprovides power to the device.The part belongs to Programmable Logic Devices family.Chips are programmed with 68 pins.It is also characterized by LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.Currently, it is powered by 5Vsources.In order to ensure proper operation, a maximum supply voltage (Vsup) of 5.25V is required.A total of 7dedicated inputs are available for the purpose of detecting input signals.The supply voltage (Vsup) should be greater than 4.75V.It should not exceed 50MHzin its clock frequency.Programmable logic types are divided into OT PLD.Ideally, the operating temperature should be below 70°C.
EPM5128LC-1 Features
52 I/Os
68 pin count
5V power supplies
EPM5128LC-1 Applications
There are a lot of Altera EPM5128LC-1 CPLDs applications.
- Custom state machines
- Timing control
- Reset swapping
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Portable digital devices
- Pattern recognition
- D/T registers and latches
- Configurable Addressing of I/O Boards
- DDC INTERFACE
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
