EPM5128LC-2
| Parameters | |
|---|---|
| Surface Mount | YES |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 68 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 68 |
| JESD-30 Code | S-PQCC-J68 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 52 |
| Clock Frequency | 40MHz |
| Propagation Delay | 45 ns |
| Organization | 7 DEDICATED INPUTS, 52 I/O |
| Programmable Logic Type | OT PLD |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 7 |
| In-System Programmable | NO |
| RoHS Status | Non-RoHS Compliant |
EPM5128LC-2 Overview
Currently, there are 128 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is equipped with 52I/O ports.68terminations have been programmed into the device.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The power source is powered by 5Vvolts.This part is part of the family [0].With 68pins programmed, the chip is ready to use.It is also characterized by LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.It runs on 5Vvolts of power.In this case, the maximum supply voltage (Vsup) is 5.25V.Input signals are detected using 7dedicated inputs.In order to operate properly, the supply voltage (Vsup) should be greater than 4.75V.The clock frequency should not exceed 40MHz.There are several types of programmable logic that can be categorized as OT PLD.It is recommended that the operating temperature be kept below 70°C.
EPM5128LC-2 Features
52 I/Os
68 pin count
5V power supplies
EPM5128LC-2 Applications
There are a lot of Altera EPM5128LC-2 CPLDs applications.
- White goods (Washing, Cold, Aircon ,...)
- INTERRUPT SYSTEM
- DDC INTERFACE
- STANDARD SERIAL INTERFACE UART
- Address decoders
- Custom state machines
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- DMA control
- I2C BUS INTERFACE
- ON-CHIP OSCILLATOR CIRCUIT
