EPM5130GC-1
| Parameters | |
|---|---|
| Surface Mount | NO |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | PERPENDICULAR |
| Terminal Form | PIN/PEG |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 100 |
| JESD-30 Code | S-CPGA-P100 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 64 |
| Clock Frequency | 50MHz |
| Propagation Delay | 40 ns |
| Organization | 19 DEDICATED INPUTS, 64 I/O |
| Programmable Logic Type | UV PLD |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 19 |
| In-System Programmable | NO |
| RoHS Status | Non-RoHS Compliant |
EPM5130GC-1 Overview
This network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).In this case, there are 64 I/Os programmed.100terminations have been programmed into the device.This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.It is powered by a voltage of 5V volts.The part is included in Programmable Logic Devices.100pins are programmed on the chip.This device also displays [0].It runs on 5Vvolts of power.In order to ensure proper operation, a maximum supply voltage (Vsup) of 5.25V is required.The input signals are detected by 19dedicated inputs.It is recommended that the supply voltage (Vsup) be greater than 4.75V.It should not exceed 50MHzin its clock frequency.A programmable logic type is classified as UV PLD.Operating temperatures should not exceed 70°C.
EPM5130GC-1 Features
64 I/Os
100 pin count
5V power supplies
EPM5130GC-1 Applications
There are a lot of Altera EPM5130GC-1 CPLDs applications.
- Cross-Matrix Switch
- USB Bus
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Configurable Addressing of I/O Boards
- Auxiliary Power Supply Isolated and Non-isolated
- Page register
- Custom shift registers
- INTERRUPT SYSTEM
- Custom state machines
