EPM5192GM883B
| Parameters | |
|---|---|
| Surface Mount | NO |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 84 |
| ECCN Code | 3A001.A.2.C |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | PERPENDICULAR |
| Terminal Form | PIN/PEG |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| JESD-30 Code | S-CPGA-P84 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 125°C |
| Operating Temperature (Min) | -55°C |
| Power Supplies | 5V |
| Temperature Grade | MILITARY |
| Number of I/O | 64 |
| Clock Frequency | 33.3MHz |
| Propagation Delay | 55 ns |
| Organization | 7 DEDICATED INPUTS, 64 I/O |
| Programmable Logic Type | UV PLD |
| Screening Level | 38535Q/M;38534H;883B |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 7 |
| In-System Programmable | NO |
| Height Seated (Max) | 4.96mm |
| Length | 28.45mm |
| Width | 28.45mm |
| RoHS Status | Non-RoHS Compliant |
EPM5192GM883B Overview
There are 192 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The device has 64inputs and outputs.It is programmed that device terminations will be 84 .This electrical part is wired with a terminal position of PERPENDICULAR.An electrical supply voltage of 5V is used to power it.The part belongs to Programmable Logic Devices family.In this chip, the 84pins are programmed.It is also characterized by LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.There is 5V power supply available for it.A total of 7dedicated inputs are available for detecting the status of input signals.This device should not have an clock frequency greater than 33.3MHz.Programmable logic types can be divided into UV PLD.Operating temperatures should not exceed 125°C.Ideally, the operating temperature should be [0].
EPM5192GM883B Features
64 I/Os
84 pin count
5V power supplies
EPM5192GM883B Applications
There are a lot of Altera EPM5192GM883B CPLDs applications.
- Protection relays
- D/T registers and latches
- Digital designs
- ON-CHIP OSCILLATOR CIRCUIT
- Multiple Clock Source Selection
- Auxiliary Power Supply Isolated and Non-isolated
- Software-driven hardware configuration
- Programmable polarity
- ROM patching
- Wide Vin Industrial low power SMPS
