EPM5192JC
| Parameters | |
|---|---|
| Surface Mount | YES |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| JESD-30 Code | S-CQCC-J84 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 64 |
| Clock Frequency | 40MHz |
| Propagation Delay | 55 ns |
| Organization | 7 DEDICATED INPUTS, 64 I/O |
| Programmable Logic Type | UV PLD |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 7 |
| In-System Programmable | NO |
| Height Seated (Max) | 5.08mm |
| Length | 29.21mm |
| Width | 29.21mm |
| RoHS Status | Non-RoHS Compliant |
EPM5192JC Overview
There are 192 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.In this case, there are 64 I/Os programmed.It is programmed to terminate devices at [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 5V is used as the power supply for this device.It belongs to the family [0].There are 84 pins on the chip.If this device is used, you will also be able to find [0].A total of 5V power supplies are needed to run it.In this case, the maximum supply voltage (Vsup) reaches 5.25V.Input signals are detected using 7dedicated inputs.The supply voltage (Vsup) should be greater than 4.75V.The clock frequency of this device should not exceed 40MHz.This kind of FPGA is composed of UV PLD.The operating temperature should be kept below [0].
EPM5192JC Features
64 I/Os
84 pin count
5V power supplies
EPM5192JC Applications
There are a lot of Altera EPM5192JC CPLDs applications.
- Battery operated portable devices
- High speed graphics processing
- Boolean function generators
- Portable digital devices
- Bootloaders for FPGAs
- White goods (Washing, Cold, Aircon ,...)
- DMA control
- Digital multiplexers
- Digital systems
- Multiple DIP Switch Replacement
