Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
TQFP |
Number of Pins |
144 |
Packaging |
Bulk |
Published |
2003 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
144 |
Termination |
SMD/SMT |
Terminal Finish |
Matte Tin (Sn) - annealed |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
IT CAN ALSO OPERATE AT 3.3V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Frequency |
304MHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
144 |
Operating Supply Voltage |
3.3V |
Temperature Grade |
OTHER |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
2.375V |
Memory Size |
1kB |
Operating Supply Current |
55mA |
Number of I/O |
116 |
Nominal Supply Current |
55mA |
Memory Type |
FLASH |
Propagation Delay |
8.7 ns |
Turn On Delay Time |
8.7 ns |
Frequency (Max) |
304MHz |
Number of Logic Elements/Cells |
570 |
Number of Programmable I/O |
116 |
Number of Logic Blocks (LABs) |
57 |
Speed Grade |
5 |
Output Function |
MACROCELL |
Number of Macro Cells |
440 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height |
1.4mm |
Length |
20mm |
Width |
20mm |
Radiation Hardening |
No |
REACH SVHC |
Unknown |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
EPM570T144C5N Overview
There are 440 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is part of the TQFP package.In this case, there are 116 I/Os programmed.The device is programmed with 144 terminations.Its terminal position is QUAD.Power is supplied by a voltage of 2.5V volts.There is a part in the family [0].It is recommended that the chip be packaged by Bulk.In this chip, the 144pins are programmed.Additionally, this device is capable of displaying [0].For high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].The electronic part is mounted by Surface Mount.The 144pins are designed into the board.There is a maximum supply voltage of 3.6Vwhen the device is operating.Initially, it requires a voltage of 2.375Vas the minimum supply voltage.There are 116 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. A frequency of 304MHzcan be achieved.In order to operate, the temperature should be higher than 0°C.A temperature lower than 85°Cis recommended for operation.There are 57 logic blocks (LABs) in its basic building block.In order to form a fundamental building block, there are 570logic elements/cells.Maximum frequency should be less than 304MHz.The devices contain a memory of 1kBfor storing programs and data.
EPM570T144C5N Features
TQFP package
116 I/Os
144 pin count
144 pins
57 logic blocks (LABs)
EPM570T144C5N Applications
There are a lot of Altera EPM570T144C5N CPLDs applications.
- Power Meter SMPS
- Software-Driven Hardware Configuration
- POWER-SAVING MODES
- ON-CHIP OSCILLATOR CIRCUIT
- Voltage level translation
- ROM patching
- Field programmable gate
- Power up sequencing
- Pattern recognition
- Bootloaders for FPGAs