EPM7064AEFC100-7
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 100-LBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000A |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7064 |
| JESD-30 Code | S-PBGA-B100 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 68 |
| Clock Frequency | 135.1MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 1250 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 4 |
| Height Seated (Max) | 1.7mm |
| Length | 11mm |
| Width | 11mm |
| RoHS Status | RoHS Compliant |
EPM7064AEFC100-7 Overview
64macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.In the 100-LBGApackage, you will find it.The device is programmed with 68 I/O ports.It is programmed that device terminations will be 100 .BOTTOMis the terminal position of this electrical part.The power source is powered by 3.3Vvolts.This part is part of the family [0].It is recommended that the chip be packaged by Tray.It operates with the operating temperature of 0°C~70°C TA to ensure its reliability.Mount the chip by Surface Mount.This type of FPGA is a part of the MAX? 7000A series.The EPM7064shows its related parts.1250gates are devices that serve as building blocks for digital circuits.There are 4 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.It runs on a voltage of 2.5/3.33.3Vvolts.3.6Vrepresents the maximal supply voltage (Vsup).It is recommended that the supply voltage (Vsup) be greater than 3V.The clock frequency of the device should not exceed 135.1MHz.
EPM7064AEFC100-7 Features
100-LBGA package
68 I/Os
The operating temperature of 0°C~70°C TA
2.5/3.33.3V power supplies
EPM7064AEFC100-7 Applications
There are a lot of Intel EPM7064AEFC100-7 CPLDs applications.
- Complex programmable logic devices
- INTERRUPT SYSTEM
- Power automation
- Digital multiplexers
- State machine design
- White goods (Washing, Cold, Aircon ,...)
- Discrete logic functions
- Reset swapping
- Interface bridging
- State machine control
