Parameters |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
3.3V |
Terminal Pitch |
1.27mm |
Frequency |
125MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
44 |
Operating Supply Voltage |
3.3V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
36 |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Turn On Delay Time |
10 ns |
Frequency (Max) |
222.2MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
1250 |
Number of Programmable I/O |
36 |
Number of Logic Blocks (LABs) |
4 |
Speed Grade |
10 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Length |
16.5862mm |
Width |
16.5862mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Contains Lead |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
44 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
1 |
Number of Terminations |
44 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
EPM7064AELC44-10 Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is enclosed in a PLCC package.In this case, there are 36 I/Os programmed.It is programmed that device terminations will be 44 .This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 3.3Vprovides power to the device.It is included in Programmable Logic Devices.A chip with 44pins is programmed.It is possible to construct digital circuits using 1250gates, which are devices that serve as building blocks.For high efficiency, the supply voltage should be maintained at [0].In this case, EEPROMwill be used to store the data.This electronic part is mounted in the way of Surface Mount.The device has a pinout of [0].This device operates at a voltage of 3.6V when the maximum supply voltage is applied.With a minimal supply voltage of [0], it operates.There are 36 programmable I/Os in this system.This frequency is 125MHz.In order to operate properly, the operating temperature should be higher than 0°C.The operating temperature should be lower than 70°C.In total, it contains 4 logic blocks (LABs).Maximum frequency should be less than 222.2MHz.Programmable logic types can be divided into EE PLD.
EPM7064AELC44-10 Features
PLCC package
36 I/Os
44 pin count
44 pins
4 logic blocks (LABs)
EPM7064AELC44-10 Applications
There are a lot of Altera EPM7064AELC44-10 CPLDs applications.
- Programmable polarity
- Software-Driven Hardware Configuration
- Random logic replacement
- Bootloaders for FPGAs
- State machine design
- ToR/Aggregation/Core Switch and Router
- Discrete logic functions
- STANDARD SERIAL INTERFACE UART
- Preset swapping
- Storage Cards and Storage Racks