Parameters |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7064 |
JESD-30 Code |
S-PQFP-G100 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
2.5/3.33.3V |
Supply Voltage-Min (Vsup) |
3V |
Programmable Type |
In System Programmable |
Number of I/O |
68 |
Clock Frequency |
222.2MHz |
Number of Gates |
1250 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Delay Time tpd(1) Max |
4.5ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
1.27mm |
RoHS Status |
Non-RoHS Compliant |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
100-TQFP |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 7000A |
JESD-609 Code |
e0 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn85Pb15) |
EPM7064AETC100-4 Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a 100-TQFP package containing it.As a result, it has 68 I/O ports programmed.The termination of a device is set to [0].This electrical part has a terminal position of QUADand is connected to the ground.The device is powered by a voltage of 3.3V volts.The part is included in Programmable Logic Devices.It is recommended that the chip be packaged by Tray.The temperature at which it operates is set to 0°C~70°C TAin order to ensure its reliability.It is recommended that the chip be mounted by Surface Mount.It is a type of FPGA belonging to the MAX? 7000A series.Its related parts can be found in the [0].A digital circuit is built using 1250gates.There are 4 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.This device runs on 2.5/3.33.3Vvolts of electricity.Vsup reaches 3.6Vas the maximum supply voltage.In order to operate properly, the supply voltage (Vsup) should be greater than 3V.A frequency of 222.2MHzshould not be exceeded by its clock.
EPM7064AETC100-4 Features
100-TQFP package
68 I/Os
The operating temperature of 0°C~70°C TA
2.5/3.33.3V power supplies
EPM7064AETC100-4 Applications
There are a lot of Intel EPM7064AETC100-4 CPLDs applications.
- Dedicated input registers
- Synchronous or asynchronous mode
- LED Lighting systems
- Software-Driven Hardware Configuration
- Parity generators
- High speed graphics processing
- Software Configuration of Add-In Boards
- Cross-Matrix Switch
- Handheld digital devices
- Programmable polarity