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EPM7064AETC100-7

0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP


  • Manufacturer: Altera
  • Nocochips NO: 2936-EPM7064AETC100-7
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 705
  • Description: 0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP (Kg)

Details

Tags

Parameters
Factory Lead Time 1 Week
Mount Surface Mount
Package / Case TQFP
Number of Pins 100
Packaging Bulk
Published 1998
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 235
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Number of Outputs 68
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 222.2MHz
Architecture PLA-TYPE
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 4
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.27mm
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7064AETC100-7 Overview


There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is embedded in the TQFP package.The device is programmed with 68 I/Os.Devices are programmed with terminations of [0].QUADis the terminal position of this electrical part.The power supply voltage is 3.3V.This part is included in Programmable Logic Devices.Bulkshould be used to package the chip.There are 100pins on the chip.For digital circuits, there are 1250gates. These devices serve as building blocks.For high efficiency, the supply voltage should be maintained at [0].It is adopted to store data in [0].This device is mounted by Surface Mount.It is designed with 100 pins.It operates with the maximal supply voltage of 3.6V.A minimum supply voltage of 3V is required for this device to operate.There are 68 programmable I/Os in this system.There is 166.67MHz frequency that can be achieved.In order to operate properly, the operating temperature should be higher than 0°C.Temperatures should not exceed 70°C.4logic blocks (LABs) make up this circuit.It is recommended that the maximal frequency be lower than 222.2MHz.Programmable logic types are divided into EE PLD.The device is configured with an output of [0].

EPM7064AETC100-7 Features


TQFP package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
68 outputs

EPM7064AETC100-7 Applications


There are a lot of Altera EPM7064AETC100-7 CPLDs applications.

  • I/O expansion
  • Software Configuration of Add-In Boards
  • Bootloaders for FPGAs
  • Synchronous or asynchronous mode
  • I2C BUS INTERFACE
  • Programmable polarity
  • Digital designs
  • Interface bridging
  • STANDARD SERIAL INTERFACE UART
  • USB Bus

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