Parameters |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Delay Time tpd(1) Max |
7.5ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
1.27mm |
RoHS Status |
RoHS Compliant |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
100-TQFP |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tray |
Series |
MAX® 7000A |
JESD-609 Code |
e3 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
EPM7064 |
JESD-30 Code |
S-PQFP-G100 |
Number of Outputs |
68 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
2.5/3.33.3V |
Supply Voltage-Min (Vsup) |
3V |
Programmable Type |
In System Programmable |
Number of I/O |
68 |
Clock Frequency |
135.1MHz |
Propagation Delay |
7.5 ns |
Architecture |
PLA-TYPE |
Number of Inputs |
68 |
Number of Gates |
1250 |
EPM7064AETI100-7N Overview
There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is part of the 100-TQFP package.As you can see, this device has 68 I/O ports programmed into it.There is a 100terminations set on devices.Its terminal position is QUAD.The power supply voltage is 3.3V.The part belongs to Programmable Logic Devices family.It is recommended that the chip be packaged by Tray.During operation, the operating temperature is kept at -40°C~85°C TA to ensure its reliability.Chips should be mounted by Surface Mount.It belongs to the MAX? 7000Aseries of FPGAs.The EPM7064can be used to identify its related parts.The 1250gates serve as building blocks for digital circuits.A logic element or block has 4elements.There is 2.5/3.33.3V power supply available for it.Vsup reaches 3.6Vas the maximum supply voltage.It is important that the supply voltage (Vsup) exceeds 3VV.A frequency of 135.1MHzshould not be exceeded by its clock.This device is configured to output [0].A total of 68inputs are used.
EPM7064AETI100-7N Features
100-TQFP package
68 I/Os
The operating temperature of -40°C~85°C TA
2.5/3.33.3V power supplies
68 outputs
EPM7064AETI100-7N Applications
There are a lot of Intel EPM7064AETI100-7N CPLDs applications.
- Timing control
- Power Meter SMPS
- I/O PORTS (MCU MODULE)
- Programmable polarity
- Digital systems
- Address decoding
- Interface bridging
- Page register
- Reset swapping
- DMA control