Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
100 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn63Pb37) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
2.5V |
Terminal Pitch |
1mm |
Frequency |
250MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Power Supplies |
1.8/3.32.5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
68 |
Memory Type |
EEPROM |
Propagation Delay |
5 ns |
Frequency (Max) |
303MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
1250 |
Number of Programmable I/O |
68 |
Number of Logic Blocks (LABs) |
4 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.7mm |
Length |
11mm |
Width |
11mm |
RoHS Status |
RoHS Compliant |
EPM7064BFC100-5 Overview
In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.The product is contained in a FBGA package.The device is programmed with 68 I/O ports.100terminations have been programmed into the device.BOTTOMis the terminal position of this electrical part.A voltage of 2.5V is used as the power supply for this device.There is a part in the family [0].With 100pins programmed, the chip is ready to use.It is also possible to find YESwhen using this device.As a building block for digital circuits, there are 1250gates.Data is stored using [0].Surface Mountis used to mount this electronic component.The 100pins are designed into the board.This device operates at a voltage of 3.6Vas its maximum supply voltage.Despite its minimal supply voltage of [0], it is capable of operating.In order for the device to operate, it requires 1.8/3.32.5V power supplies.A total of 68Programmable I/Os are present.The frequency that can be achieved is 250MHz.It is recommended that the operating temperature be higher than 0°C.Ideally, the operating temperature should be below 70°C.It is composed of 4 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.This kind of FPGA is composed of EE PLD.
EPM7064BFC100-5 Features
FBGA package
68 I/Os
100 pin count
100 pins
1.8/3.32.5V power supplies
4 logic blocks (LABs)
EPM7064BFC100-5 Applications
There are a lot of Altera EPM7064BFC100-5 CPLDs applications.
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Power automation
- Custom state machines
- PLC analog input modules
- Programmable polarity
- D/T registers and latches
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- High speed graphics processing
- Discrete logic functions
- Digital systems