EPM7064BTC48-5
| Parameters | |
|---|---|
| Package / Case | TQFP |
| Surface Mount | YES |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 48 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Qualification Status | Not Qualified |
| Power Supplies | 1.8/3.32.5V |
| Propagation Delay | 5 ns |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Logic Blocks (LABs) | 4 |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| RoHS Status | Non-RoHS Compliant |
EPM7064BTC48-5 Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The item is enclosed in a TQFP package.48terminations have been programmed into the device.The terminal position of this electrical component is QUAD.It belongs to the family [0].This device is also capable of displaying [0].As a building block for digital circuits, there are 1250gates.A power supply of 1.8/3.32.5Vis required to operate it.In its simplest form, it consists of 4 logic blocks (LABs).There is a type of programmable logic called EE PLD.
EPM7064BTC48-5 Features
TQFP package
1.8/3.32.5V power supplies
4 logic blocks (LABs)
EPM7064BTC48-5 Applications
There are a lot of Altera EPM7064BTC48-5 CPLDs applications.
- Interface bridging
- Page register
- Boolean function generators
- Code converters
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Digital systems
- D/T registers and latches
- Cross-Matrix Switch
- Power Meter SMPS
