Parameters |
Clock Frequency |
100MHz |
Propagation Delay |
15 ns |
Number of Gates |
1250 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
15ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
5.08mm |
RoHS Status |
Non-RoHS Compliant |
Mounting Type |
Surface Mount |
Package / Case |
68-LCC (J-Lead) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 7000 |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
68 |
ECCN Code |
EAR99 |
Terminal Finish |
TIN LEAD |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7064 |
JESD-30 Code |
S-PQCC-J68 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
Programmable Type |
EE PLD |
Number of I/O |
52 |
EPM7064LC68-15 Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In the 68-LCC (J-Lead)package, you will find it.There are 52 I/Os on the board.Terminations of devices are set to [0].The terminal position of this electrical component is QUAD.The device is powered by a voltage of 5V volts.The part is included in Programmable Logic Devices.It is recommended that the chip be packaged by Tray.To ensure its reliability, the operating temperature is set to [0].Ensure that the chip is mounted by Surface Mount.This type of FPGA is a part of the MAX? 7000 series.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vwhen using this device.EPM7064contains its related parts.1250gates are devices that serve as building blocks for digital circuits.There are 4 logic elements or blocks present.A total of 3.3/55V power supplies are needed to run it.A maximum supply voltage (Vsup) of 5.25V is provided.It should not exceed 100MHzin terms of clockfrequency.
EPM7064LC68-15 Features
68-LCC (J-Lead) package
52 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7064LC68-15 Applications
There are a lot of Intel EPM7064LC68-15 CPLDs applications.
- PULSE WIDTH MODULATION (PWM)
- LED Lighting systems
- I2C BUS INTERFACE
- TIMERS/COUNTERS
- Software-driven hardware configuration
- I/O expansion
- Preset swapping
- Pattern recognition
- Storage Cards and Storage Racks
- Programmable power management