EPM7064LC84-10
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height | 3.81mm |
| Length | 29.31mm |
| Width | 29.31mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7064LC84-10 Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is part of the PLCC package.As a result, it has 68 I/O ports programmed.84terminations are programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.Power is provided by a supply voltage of 5V volts.There is a part in the family [0].With 84pins programmed, the chip is ready to use.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.For digital circuits, there are 1250gates. These devices serve as building blocks.The supply voltage should be maintained at 5V for high efficiency.In general, it is recommended to store data in [0].The electronic component is mounted by Surface Mount.84pins are included in its design.In this case, the maximum supply voltage is 5.25V.Despite its minimal supply voltage of [0], it is capable of operating.In total, there are 68programmable I/Os.The frequency that can be achieved is 125MHz.There should be a temperature above 0°Cat the time of operation.A temperature lower than 70°Cis recommended for operation.In its simplest form, it consists of 4 logic blocks (LABs).There should be a lower maximum frequency than 151.5MHz.A programmable logic type can be categorized as EE PLD.
EPM7064LC84-10 Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064LC84-10 Applications
There are a lot of Altera EPM7064LC84-10 CPLDs applications.
- ON-CHIP OSCILLATOR CIRCUIT
- Power up sequencing
- Interface bridging
- Address decoding
- Dedicated input registers
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Programmable power management
- Multiple DIP Switch Replacement
- I2C BUS INTERFACE
- I/O PORTS (MCU MODULE)
