Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
84 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
2 |
Number of Terminations |
84 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Frequency |
125MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
84 |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
68 |
Memory Type |
EEPROM |
Propagation Delay |
12 ns |
Turn On Delay Time |
12 ns |
Frequency (Max) |
151.5MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
1250 |
Number of Programmable I/O |
68 |
Number of Logic Blocks (LABs) |
4 |
Speed Grade |
12 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
In-System Programmable |
NO |
Height Seated (Max) |
5.08mm |
Length |
29.3116mm |
Width |
29.3116mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
EPM7064LC84-12 Overview
In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.You can find it in package [0].It is programmed with 68 I/Os.It is programmed that device terminations will be 84 .Its terminal position is QUAD.Power is provided by a supply voltage of 5V volts.This part is part of the family [0].84pins are programmed on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vis also available.The 1250gates serve as building blocks for digital circuits.In order to achieve high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].In this case, Surface Mountis used to mount the electronic component.The 84pins are designed into the board.There is a maximum supply voltage of 5.25V.A minimum supply voltage of 4.75V is required for this device to operate.There are 68 Programmable I/Os.There is a maximum frequency of 125MHz.There should be a temperature above 0°Cat the time of operation.A temperature below 70°Cshould be used as the operating temperature.It is composed of 4 logic blocks (LABs).There should be a lower maximum frequency than 151.5MHz.There is a type of programmable logic called EE PLD.
EPM7064LC84-12 Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064LC84-12 Applications
There are a lot of Altera EPM7064LC84-12 CPLDs applications.
- Page register
- Reset swapping
- Address decoders
- D/T registers and latches
- USB Bus
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Synchronous or asynchronous mode
- Power automation
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Parity generators