Parameters |
Programmable Type |
EE PLD |
Number of I/O |
68 |
Clock Frequency |
100MHz |
Propagation Delay |
15 ns |
Number of Gates |
1250 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
15ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
5.08mm |
Length |
29.3116mm |
Width |
29.3116mm |
RoHS Status |
Non-RoHS Compliant |
Mounting Type |
Surface Mount |
Package / Case |
84-LCC (J-Lead) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 7000 |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
84 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7064 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
EPM7064LC84-15 Overview
In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.It is contained in package [0].The device is programmed with 68 I/O ports.Terminations of devices are set to [0].Its terminal position is QUAD.The device is powered by a voltage of 5V volts.There is a part in the family [0].As a result, it is packaged as Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Mount the chip by Surface Mount.As part of the MAX? 7000series, it is a type of FPGA.If you use this device, you will also find [0].You can find its related parts in the [0].In digital circuits, 1250gates serve as building blocks.4logic elements/blocks exist.It runs on a voltage of 3.3/55Vvolts.A maximum supply voltage (Vsup) of 5.25V is provided.Ideally, its clock frequency should not exceed 100MHz.
EPM7064LC84-15 Features
84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7064LC84-15 Applications
There are a lot of Intel EPM7064LC84-15 CPLDs applications.
- State machine design
- Dedicated input registers
- Custom shift registers
- Timing control
- Protection relays
- I/O PORTS (MCU MODULE)
- Storage Cards and Storage Racks
- Code converters
- Random logic replacement
- Address decoding