EPM7064LI84-15
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 15 ns |
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 5.08mm |
| Length | 29.3116mm |
| Width | 29.3116mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7064LI84-15 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).PLCCis the package in which it resides.The device is programmed with 68 I/O ports.84terminations are programmed into the device.There is a QUADterminal position on the electrical part in question.It is powered from a supply voltage of 5V.The part belongs to Programmable Logic Devices family.Chips are programmed with 84 pins.If you use this device, you will also find [0].There are 1250 gates, which are devices that acts as a building block for digital circuits. It is recommended that the supply voltage be kept at 5Vto maximize efficiency.It is recommended that data be stored in [0].Surface Mountis used to mount this electronic component.The 84pins are designed into the board.A voltage of 5.5V is the maximum supply voltage for this device.A minimum supply voltage of 4.5V is required for this device to operate.A total of 68programmable I/Os are available.You can achieve 100MHzfrequencies.Ideally, the operating temperature should be greater than -40°C.Ideally, the operating temperature should be below 85°C.It is composed of 4 logic blocks (LABs).It is recommended that the maximal frequency be lower than 151.5MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM7064LI84-15 Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064LI84-15 Applications
There are a lot of Altera EPM7064LI84-15 CPLDs applications.
- Cross-Matrix Switch
- Reset swapping
- Programmable polarity
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Custom shift registers
- Complex programmable logic devices
- Auxiliary Power Supply Isolated and Non-isolated
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Power automation
- STANDARD SERIAL INTERFACE UART
