EPM7064QC100-15
| Parameters | |
|---|---|
| Turn On Delay Time | 15 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 15 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 3.65mm |
| Length | 20mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Power Supplies | 3.3/55V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 15 ns |
EPM7064QC100-15 Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The product is contained in a PQFP package.In this case, there are 68 I/Os programmed.There is a 100terminations set on devices.This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The power source is powered by 5Vvolts.The part is included in Programmable Logic Devices.It is equipped with 100 pin count.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.The 1250gates serve as building blocks for digital circuits.EEPROM is adopted for storing data.A Surface Mountis mounted on this electronic component.100pins are included in its design.There is a maximum supply voltage of 3.6V.Despite its minimal supply voltage of [0], it is capable of operating.There is 3.3/55V power supply available for it.A total of 68 Programmable I/Os are available.There can be 100MHz frequency achieved.There should be a temperature above 0°Cat the time of operation.A temperature below 70°Cshould be used as the operating temperature.It consists of 4 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7064QC100-15 Features
PQFP package
68 I/Os
100 pin count
100 pins
3.3/55V power supplies
4 logic blocks (LABs)
EPM7064QC100-15 Applications
There are a lot of Altera EPM7064QC100-15 CPLDs applications.
- Digital systems
- Code converters
- Handheld digital devices
- STANDARD SERIAL INTERFACE UART
- Synchronous or asynchronous mode
- DDC INTERFACE
- Configurable Addressing of I/O Boards
- Programmable power management
- Dedicated input registers
- Page register
