EPM7064SLC44-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 44 |
| Published | 1998 |
| JESD-609 Code | e2 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 44 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin/Copper (Sn/Cu) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 175.4MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 44 |
| Operating Supply Voltage | 5V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 36 |
| Nominal Supply Current | 110mA |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 175.4MHz |
| Number of Inputs | 36 |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| Max Junction Temperature (Tj) | 90°C |
| Ambient Temperature Range High | 70°C |
| In-System Programmable | YES |
| Height | 4.572mm |
| Length | 16.59mm |
| Width | 16.59mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7064SLC44-10N Overview
In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.It is part of the PLCC package.The device is programmed with 36 I/Os.It is programmed to terminate devices at [0].QUADis the terminal position of this electrical part.The power source is powered by 5Vvolts.There is a part included in Programmable Logic Devices.It is programmed with 44 pins.This device is also capable of displaying [0].In digital circuits, there are 1250gates, which act as a basic building block.In order to achieve high efficiency, the supply voltage should be maintained at [0].It is adopted to store data in [0].In this case, it is mounted by Surface Mount.The pins are [0].In this case, the maximum supply voltage is 5.25V.It is powered by 4.75Vas its minimum supply voltage.It runs on a voltage of 5Vvolts.There is 175.4MHz frequency that can be achieved.Ideally, the operating temperature should be greater than 0°C.It is recommended to keep the operating temperature below 70°C.There are 4 logic blocks (LABs) in its basic building block.If the maximal frequency is less than [0], it should be lower than that.A programmable logic type is categorized as EE PLD.This device uses 36 inputs.
EPM7064SLC44-10N Features
PLCC package
36 I/Os
44 pin count
44 pins
5V power supplies
4 logic blocks (LABs)
EPM7064SLC44-10N Applications
There are a lot of Altera EPM7064SLC44-10N CPLDs applications.
- Digital designs
- State machine design
- Address decoders
- DMA control
- POWER-SAVING MODES
- Wide Vin Industrial low power SMPS
- I2C BUS INTERFACE
- Boolean function generators
- Power automation
- Digital multiplexers
