Parameters |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
44 |
Packaging |
Bulk |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
1 |
Number of Terminations |
44 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Frequency |
200MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
44 |
Operating Supply Voltage |
5V |
Power Supplies |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
36 |
Memory Type |
EEPROM |
Propagation Delay |
6 ns |
Turn On Delay Time |
6 ns |
Frequency (Max) |
175.4MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
1250 |
Number of Programmable I/O |
36 |
Number of Logic Blocks (LABs) |
4 |
Speed Grade |
6 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
In-System Programmable |
YES |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Contains Lead |
EPM7064SLC44-6 Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The product is contained in a PLCC package.The device is programmed with 36 I/O ports.The termination of a device is set to [0].There is a QUADterminal position on the electrical part in question.The device is powered by a voltage of 5V volts.It belongs to the family [0].It is recommended that the chip be packaged by Bulk.There are 44 pins on the chip.If you use this device, you will also find [0].1250gates are used to construct digital circuits.If high efficiency is desired, the supply voltage should be kept at [0].In general, it is recommended to store data in [0].Surface Mountis used to mount this electronic component.The device has a pinout of [0].It operates with the maximal supply voltage of 5.25V.It is powered by 4.75Vas its minimum supply voltage.It operates from 5V power supplies.A programmable I/O count of 36 has been recorded.In this case, 200MHzis the frequency that can be achieved.It is recommended that the operating temperature be higher than 0°C.A temperature lower than 70°Cis recommended for operation.There are 4logic blocks (LABs) that make up its basic building block.The maximum frequency should not exceed 175.4MHz.Types of programmable logic are divided into EE PLD.
EPM7064SLC44-6 Features
PLCC package
36 I/Os
44 pin count
44 pins
5V power supplies
4 logic blocks (LABs)
EPM7064SLC44-6 Applications
There are a lot of Altera EPM7064SLC44-6 CPLDs applications.
- State machine design
- STANDARD SERIAL INTERFACE UART
- Pattern recognition
- ToR/Aggregation/Core Switch and Router
- Auxiliary Power Supply Isolated and Non-isolated
- Field programmable gate
- PULSE WIDTH MODULATION (PWM)
- Portable digital devices
- Timing control
- Handheld digital devices