EPM7064SLC84-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 175.4MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | YES |
| Height | 3.81mm |
| Length | 29.31mm |
| Width | 29.31mm |
| Radiation Hardening | No |
| REACH SVHC | Unknown |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7064SLC84-10N Overview
The mobile phone network has 64 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).You can find it in package [0].This device has 68 I/O ports programmed into it.The device is programmed with 84 terminations.This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 5V is used as the power supply for this device.There is a part included in Programmable Logic Devices.Chips are programmed with 84 pins.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.It is possible to construct digital circuits using 1250gates, which are devices that serve as building blocks.In order to maintain high efficiency, the supply voltage should be maintained at [0].It is adopted to store data in [0].Surface Mountis used to mount this electronic component.A total of 84pins are provided on this board.This device operates at a voltage of 5.25Vas its maximum supply voltage.In order for it to operate, a supply voltage of 4.75Vis required.A total of 68 Programmable I/Os are available.It is possible to achieve a frequency of 175.4MHz.Ideally, the operating temperature should be greater than 0°C.A temperature lower than 70°Cis recommended for operation.There are 4 logic blocks (LABs) in its basic building block.The maximal frequency should be lower than 175.4MHz.A programmable logic type is classified as EE PLD.
EPM7064SLC84-10N Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064SLC84-10N Applications
There are a lot of Altera EPM7064SLC84-10N CPLDs applications.
- Address decoding
- Power Meter SMPS
- Parity generators
- Power up sequencing
- ToR/Aggregation/Core Switch and Router
- Wide Vin Industrial low power SMPS
- Software-Driven Hardware Configuration
- High speed graphics processing
- Code converters
- Multiple Clock Source Selection
